I'm surprised a read/write test could run in every location in SDRAM since u-boot itself is based in it at some location?
I am the hardware engineer in this case. I used the BFDcCalculation spreadsheet to calculate the settings for the IS42S16160D…
I even don't know this file "ebui_calc.html", I have my own Excel Sheet , which I can share. There you will find the values I used for my calculations.
If you use a RDIV value, which is smaller than required, refresh interrupts will…
I'm not sure how useful this is but from VisualDSP++ Update 9 we added support for detecting when an application's stack size increases beyond its allocated size. You will find more information on page 9-8 of the attached Release Note for Update…
as VisualDSP++ 5.0 was released almost 3 years ago, there have been a number of bug fixes and improvements to the tools throughout the updates we have issues in that time.
Attached is the release note from VisualDSP++ 5.0 Update 8. This Release…
the ADSP-BF561 supports SDR-SDRAM.
The ADSP-BF60x family supports DDR2-SDRAM and LPDDR-SDRAM.
The technologies are not compatible.
No, there should be no issues upgrading.
Upgrading is a simple process. First, you can obtain the latest version of VisualDSP++ (5.1.2) from the VisualDSP++ Development Software Product Page here:
I work with: VisualDSP++ 5.0 Update 10.1, ICE-100B and ADSP-BF561 EZ-KIT Lites.
I plugged the SPI flash M25P16 to the ADSP-BF561 EZ-KIT Lites.
Use The Flash Programmer.
A Flash Driver (.dxe) to download?
If someone give me some usefull information…
ADI DSP ADSP-BF561原装开发板的PCB图,非常难得使用PADS打开附件：ADI DSP ADSP-BF561原装开发板的PCB图,非常难得
ADSP-SC587 interfaced with ADSP-BF561 through SPORT in our custom board, issue is when we set clock frequency 1 MHz communication between the processor is fine. But when we increase the clock frequency, clock is getting deteriorated. Our requirement…